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» Quasi-Resonant Interconnects: A Low Power Design Methodology
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OTM
2007
Springer
13 years 12 months ago
A Bluetooth-Based JXME Infrastructure
Abstract. Over the last years, research efforts have led the way to embed computation into the environment. Much attention is drawn to technologies supporting dynamicity and mobil...
Carlo Blundo, Emiliano De Cristofaro
VLSID
2002
IEEE
126views VLSI» more  VLSID 2002»
14 years 6 months ago
A Hardware/Software Reconfigurable Architecture for Adaptive Wireless Image Communication
With the projected significant growth in mobile internet and multimedia services, there is a strong demand for nextgeneration appliances capable of wireless image communication. O...
Debashis Panigrahi, Clark N. Taylor, Sujit Dey
DDECS
2007
IEEE
201views Hardware» more  DDECS 2007»
14 years 4 days ago
Built in Defect Prognosis for Embedded Memories
: As scan compression replaces the traditional scan it is important to understand how it works with power. DFT MAX represents one of the two primary scan compression solutions used...
Prashant Dubey, Akhil Garg, Sravan Kumar Bhaskaran...
GLVLSI
2003
IEEE
310views VLSI» more  GLVLSI 2003»
13 years 11 months ago
54x54-bit radix-4 multiplier based on modified booth algorithm
In this paper, we describe a low power and high speed multiplier suitable for standard cell-based ASIC design methodologies. For the purpose, an optimized booth encoder, compact 2...
Ki-seon Cho, Jong-on Park, Jin-seok Hong, Goang-se...
ICCAD
2006
IEEE
152views Hardware» more  ICCAD 2006»
14 years 2 months ago
Performance-oriented statistical parameter reduction of parameterized systems via reduced rank regression
Process variations in modern VLSI technologies are growing in both magnitude and dimensionality. To assess performance variability, complex simulation and performance models param...
Zhuo Feng, Peng Li