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» RC Interconnect Optimization Under the Elmore Delay Model
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EURODAC
1994
IEEE
127views VHDL» more  EURODAC 1994»
13 years 9 months ago
Optimal equivalent circuits for interconnect delay calculations using moments
In performance-driven interconnect design, delay estimators are used to determine both the topology and the layout of good routing trees. We address the class of moment-matching, ...
Sudhakar Muddu, Andrew B. Kahng
ISPD
2003
ACM
133views Hardware» more  ISPD 2003»
13 years 10 months ago
Closed form expressions for extending step delay and slew metrics to ramp inputs
: Recent years have seen significant research in finding closed form expressions for the delay of an RC circuit that improves upon the Elmore delay model. However, several of these...
Chandramouli V. Kashyap, Charles J. Alpert, Frank ...
ISPD
1997
ACM
110views Hardware» more  ISPD 1997»
13 years 9 months ago
Performance driven global routing for standard cell design
Advances in fabrication technology have resulted in a continual shrinkage of device dimensions. This has resulted in smaller device delays, greater resistance along interconnect w...
Jason Cong, Patrick H. Madden
ISPD
1999
ACM
95views Hardware» more  ISPD 1999»
13 years 9 months ago
Incremental capacitance extraction and its application to iterative timing-driven detailed routing
In this paper, we consider delay optimization in multilayer detailed routing. Given a detailed routing by some detailed router, we iteratively improve the delays of critical nets ...
Yanhong Yuan, Prithviraj Banerjee
DAC
2001
ACM
14 years 6 months ago
Analysis of Non-Uniform Temperature-Dependent Interconnect Performance in High Performance ICs
Non-uniform temperature profiles along global interconnect lines in high-performance ICs can significantly impact the performance of these lines. This paper presents a detailed an...
Amir H. Ajami, Kaustav Banerjee, Massoud Pedram, L...