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» Race-condition-aware clock skew scheduling
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ASPDAC
2007
ACM
102views Hardware» more  ASPDAC 2007»
13 years 9 months ago
Clock Skew Scheduling with Delay Padding for Prescribed Skew Domains
Clock skew scheduling is a technique that intentionally introduces skews to memory elements to improve the performance of a sequential circuit. It was shown in [21] that the full ...
Chuan Lin, Hai Zhou
ICCAD
2009
IEEE
123views Hardware» more  ICCAD 2009»
13 years 2 months ago
Multi-level clustering for clock skew optimization
Clock skew scheduling has been effectively used to reduce the clock period of sequential circuits. However, this technique may become impractical if a different skew must be appli...
Jonas Casanova, Jordi Cortadella
DAC
2005
ACM
14 years 5 months ago
Race-condition-aware clock skew scheduling
The race conditions often limit the smallest feasible clock period that the optimal clock skew scheduling can achieve. Therefore, the combination of clock skew scheduling and dela...
Shih-Hsu Huang, Yow-Tyng Nieh, Feng-Pin Lu
ICCAD
2003
IEEE
134views Hardware» more  ICCAD 2003»
14 years 1 months ago
Multi-Domain Clock Skew Scheduling
The application of general clock skew scheduling is practically limited due to the difficulties in implementing a wide spectrum of dedicated clock delays in a reliable manner. Th...
Kaushik Ravindran, Andreas Kuehlmann, Ellen Sentov...
DAC
1996
ACM
13 years 9 months ago
Optimal Clock Skew Scheduling Tolerant to Process Variations
1- A methodology is presented in this paper for determining an optimal set of clock path delays for designing high performance VLSI/ULSI-based clock distribution networks. This met...
José Luis Neves, Eby G. Friedman