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» Rapid Resource-Constrained Hardware Performance Estimation
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RSP
2006
IEEE
102views Control Systems» more  RSP 2006»
13 years 10 months ago
Rapid Resource-Constrained Hardware Performance Estimation
In a hardware-software co-design environment, an application is partitioned into modules. Each module is then mapped either to software or to hardware. The mapping process is driv...
Basant Kumar Dwivedi, Arun Kejariwal, M. Balakrish...
FPL
2000
Springer
116views Hardware» more  FPL 2000»
13 years 8 months ago
High-Level Area and Performance Estimation of Hardware Building Blocks on FPGAs
Abstract. Field-programmable gate arrays (FPGAs) have become increasingly interesting in system design and due to the rapid technological progress ever larger devices are commercia...
Rolf Enzler, Tobias Jeger, Didier Cottet, Gerhard ...
RSP
2003
IEEE
176views Control Systems» more  RSP 2003»
13 years 10 months ago
Rapid Design and Analysis of Communication Systems Using the BEE Hardware Emulation Environment
This paper describes the early analysis and estimation features currently implemented in the Berkeley Emulation Engine (BEE) system. BEE is an integrated rapid prototyping and des...
Chen Chang, Kimmo Kuusilinna, Brian C. Richards, A...
DATE
2003
IEEE
135views Hardware» more  DATE 2003»
13 years 10 months ago
Estimation of Bus Performance for a Tuplespace in an Embedded Architecture
This paper describes a design methodology for the estimation of bus performance of a tuplespace for factory automation. The need of a tuplespace is motivated by the characteristic...
Nicola Drago, Franco Fummi, Marco Monguzzi, Giovan...
VLSID
1999
IEEE
139views VLSI» more  VLSID 1999»
13 years 9 months ago
Processor Modeling for Hardware Software Codesign
In hardware - software codesign paradigm often a performance estimation of the system is needed for hardware - software partitioning. The tremendous growth of application specific...
V. Rajesh, Rajat Moona