5 search results - page 1 / 1 » Realizable Reduction for Electromagnetically Coupled RLMC In... |
DATE
2004
IEEE
13 years 8 months ago
2004
IEEE
This paper presents a realizable RLMC1 reduction algorithm for extracted interconnect circuits based on two effective approaches: RL branch reduction and RC/LC node reduction. Our...
VLSI
2007
Springer
13 years 11 months ago
2007
Springer
Abstract—Analysis and verification environments for nextgeneration nano-scale RFIC designs must be able to cope with increasing design complexity and to account for new effects,...
ASPDAC
2005
ACM
13 years 6 months ago
2005
ACM
— We develop a realizable circuit reduction to generate the interconnect macro-model for parasitic estimation in wideband applications. The inductance is represented by VPEC (vec...
ISCAS
2003
IEEE
13 years 10 months ago
2003
IEEE
High frequency digital LSIs usually consist of many subcircuits coupled with multi-conductor interconnects embedded in the substrate. They sometimes cause serious problems of the ...
SAMOS
2004
Springer
13 years 10 months ago
2004
Springer
A high-performance data-path to implement DSP kernels is proposed in this paper. The data-path is based on a flexible, universal, and regular component to optimally exploiting both...