9 search results - page 2 / 2 » Reconfigurable Shuffle Network Design in LDPC Decoders |
ASPDAC
2001
ACM
13 years 8 months ago
2001
ACM
Abstract- Avirtual interfacebetweenJava andFPGA for networked reconfigurationis presented. ThroughtheJavaflFPGAinterface,Java applicationscan exploithardwareaccelerators with FPGAs...
ICCD
2004
IEEE
14 years 1 months ago
2004
IEEE
Networks-on-Chip (NoC), a new SoC paradigm, has been proposed as a solution to mitigate complex on-chip interconnect problems. NoC architecture consists of a collection of IP core...
ICC
2009
IEEE
13 years 11 months ago
2009
IEEE
Abstract—We consider non-asymmetric distributed source coding (DSC) that achieves any point in the Slepian-Wolf (SW) region. We study the error propagation phenomena and propose ...
DATE
2010
IEEE
13 years 10 months ago
2010
IEEE
There is a growing concern about the increasing vulnerability of future computing systems to errors in the underlying hardware. Traditional redundancy techniques are expensive for...