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JEC
2006
100views more  JEC 2006»
13 years 4 months ago
RC-SIMD: Reconfigurable communication SIMD architecture for image processing applications
During the last two decades, Single Instruction Multiple Data (SIMD) processors have become important architectures in embedded systems for image processing applications. The main ...
Hamed Fatemi, Bart Mesman, Henk Corporaal, Twan Ba...
IPPS
2006
IEEE
13 years 11 months ago
Reconfigurable communications for image processing applications
: This work tries to reuse programmable communication resources like a Network-on-Chip (NoC) in the acceleration of image applications. We show a mathematical model for the computa...
André Borin Soares, Luigi Carro, Altamiro A...
DAC
1999
ACM
13 years 9 months ago
Dynamically Reconfigurable Architecture for Image Processor Applications
This work presents an overview of the principles that underlie the speed-up achievable by dynamic hardware reconfiguration, proposes a more precise taxonomy for the execution mode...
Alexandro M. S. Adário, Eduardo L. Roehe, S...
CODES
1996
IEEE
13 years 9 months ago
Two-level Partitioning of Image Processing Algorithms for the Parallel Map-oriented Machine
The partitioning of image processing algorithms with a novel hardware/software co-designframework (CoDe-X) is presented in this paper, where a new Xputer-architecture (parallel Ma...
Reiner W. Hartenstein, Jürgen Becker, Rainer ...
ICCD
2001
IEEE
112views Hardware» more  ICCD 2001»
14 years 1 months ago
Run-Time Execution of Reconfigurable Hardware in a Java Environment
We present tools that support the runtime execution of applications that mix software running on networks of workstations and reconfigurable hardware. We use JHDL to describe the ...
Laurie A. Smith King, Heather Quinn, Miriam Leeser...