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SIAMCOMP
2000
66views more  SIAMCOMP 2000»
13 years 5 months ago
Computations of Uniform Recurrence Equations Using Minimal Memory Size
We consider a system of uniform recurrence equations (URE) of dimension one. We show how its computation can be carried out using minimal memory size with several synchronous proc...
Bruno Gaujal, Alain Jean-Marie, Jean Mairesse
FPGA
2008
ACM
145views FPGA» more  FPGA 2008»
13 years 7 months ago
FPGA interconnect design using logical effort
Logical effort (LE) is a linear technique for modelling the delay of a circuit in a technology independent manner. It offers the potential to simplify delay models for FPGAs and g...
Haile Yu, Yuk Hei Chan, Philip Heng Wai Leong
DATE
2006
IEEE
140views Hardware» more  DATE 2006»
13 years 11 months ago
Optimization of regular expression pattern matching circuits on FPGA
Regular expressions are widely used in Network Intrusion Detection System (NIDS) to represent patterns of network attacks. Since traditional software-only NIDS cannot catch up to ...
Cheng-Hung Lin, Chih-Tsun Huang, Chang-Ping Jiang,...
TE
2010
104views more  TE 2010»
13 years 14 days ago
Integrating Asynchronous Digital Design Into the Computer Engineering Curriculum
Abstract--As demand increases for circuits with higher performance, higher complexity, and decreased feature size, asynchronous (clockless) paradigms will become more widely used i...
Scott C. Smith, Waleed Al-Assadi, Jia Di