Sciweavers

15 search results - page 3 / 3
» Reducing Issue Queue Power for Multimedia Applications using...
Sort
View
ASPDAC
2004
ACM
129views Hardware» more  ASPDAC 2004»
13 years 10 months ago
Instruction buffering exploration for low energy VLIWs with instruction clusters
— For multimedia applications, loop buffering is an efficient mechanism to reduce the power in the instruction memory of embedded processors. In particular, software controlled ...
Tom Vander Aa, Murali Jayapala, Francisco Barat, G...
CCR
2004
91views more  CCR 2004»
13 years 5 months ago
New techniques for making transport protocols robust to corruption-based loss
Current congestion control algorithms treat packet loss as an indication of network congestion, under the assumption that most losses are caused by router queues overflowing. In r...
Wesley M. Eddy, Shawn Ostermann, Mark Allman
MICRO
2010
IEEE
156views Hardware» more  MICRO 2010»
13 years 3 months ago
Explicit Communication and Synchronization in SARC
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...
Manolis Katevenis, Vassilis Papaefstathiou, Stamat...
MOBISYS
2008
ACM
14 years 4 months ago
Peopletones: a system for the detection and notification of buddy proximity on mobile phones
Mobile phones have the potential to be useful agents for their owners by detecting and reporting situations that are of interest. Several challenges emerge in the case of detectin...
Kevin A. Li, Timothy Sohn, Steven Huang, William G...
CASES
2010
ACM
13 years 3 months ago
Balancing memory and performance through selective flushing of software code caches
Dynamic binary translators (DBTs) are becoming increasingly important because of their power and flexibility. However, the high memory demands of DBTs present an obstacle for all ...
Apala Guha, Kim M. Hazelwood, Mary Lou Soffa