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CGO
2009
IEEE
10 years 8 months ago
Reducing Memory Ordering Overheads in Software Transactional Memory
—Most research into high-performance software transactional memory (STM) assumes that transactions will run on a processor with a relatively strict memory model, such as Total St...
Michael F. Spear, Maged M. Michael, Michael L. Sco...
IEEEPACT
2009
IEEE
10 years 7 months ago
StealthTest: Low Overhead Online Software Testing Using Transactional Memory
—Software testing is hard. The emergence of multicore architectures and the proliferation of bugprone multithreaded software makes testing even harder. To this end, researchers h...
Jayaram Bobba, Weiwei Xiong, Luke Yen, Mark D. Hil...
IPPS
2010
IEEE
9 years 10 months ago
Runtime checking of serializability in software transactional memory
Abstract--Ensuring the correctness of complex implementations of software transactional memory (STM) is a daunting task. Attempts have been made to formally verify STMs, but these ...
Arnab Sinha, Sharad Malik
OPODIS
2008
10 years 2 months ago
Ordering-Based Semantics for Software Transactional Memory
It has been widely suggested that memory transactions should behave as if they acquired and released a single global lock. Unfortunately, this behavior can be expensive to achieve...
Michael F. Spear, Luke Dalessandro, Virendra J. Ma...
ISCA
2007
IEEE
174views Hardware» more  ISCA 2007»
10 years 7 months ago
An integrated hardware-software approach to flexible transactional memory
There has been considerable recent interest in the support of transactional memory (TM) in both hardware and software. We present an intermediate approach, in which hardware is us...
Arrvindh Shriraman, Michael F. Spear, Hemayet Hoss...
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