Sciweavers

6 search results - page 1 / 2
» Reducing Memory References for FFT Calculation
Sort
View
CDES
2006
106views Hardware» more  CDES 2006»
13 years 6 months ago
Reducing Memory References for FFT Calculation
Fast Fourier Transform (FFT) is one of the most widely used algorithms in digital signal processing. It is used in many signal processing and communication applications. many of t...
Ayman Elnaggar, Mokhtar Aboelaze
CC
2003
Springer
192views System Software» more  CC 2003»
13 years 9 months ago
Address Register Assignment for Reducing Code Size
Abstract. In DSP processors, minimizing the amount of address calculations is critical for reducing code size and improving performance since studies of programs have shown that in...
Mahmut T. Kandemir, Mary Jane Irwin, Guilin Chen, ...
ISCA
1995
IEEE
120views Hardware» more  ISCA 1995»
13 years 8 months ago
Streamlining Data Cache Access with Fast Address Calculation
For many programs, especially integer codes, untolerated load instruction latencies account for a significant portion of total execution time. In this paper, we present the desig...
Todd M. Austin, Dionisios N. Pnevmatikatos, Gurind...
INFORMATICALT
2008
114views more  INFORMATICALT 2008»
13 years 4 months ago
On the Processing of Decimated Signals
The aim of the given paper is development of a recursive approach for calculating the statistics of decimated realizations of a basic discrete-time signal, obtained by sampling a c...
Rimantas Pupeikis
MICRO
1997
IEEE
108views Hardware» more  MICRO 1997»
13 years 8 months ago
Improving the Accuracy and Performance of Memory Communication Through Renaming
As processors continue to exploit more instruction level parallelism, a greater demand is placed on reducing the e ects of memory access latency. In this paper, we introduce a nov...
Gary S. Tyson, Todd M. Austin