110 search results - page 22 / 22 » Reducing both dynamic and leakage energy consumption for har... |
HIPEAC
2007
Springer
13 years 11 months ago
2007
Springer
In a dynamic reordering superscalar processor, the front-end fetches instructions and places them in the issue queue. Instructions are then issued by the back-end execution core. T...
ICPPW
2007
IEEE
13 years 11 months ago
2007
IEEE
We study the role of task-level scheduling in power management on multicore multiple voltage embedded systems. Multicore on-achip, in particular DSP systems, can greatly improve p...
HIPEAC
2009
Springer
13 years 8 months ago
2009
Springer
Shrinking process technologies and growing chip sizes have profound effects on process variation. This leads to Chip Multiprocessors (CMPs) where not all cores operate at maximum f...
ICALP
2009
Springer
14 years 3 days ago
2009
Springer
Speed scaling is a power management technique that involves dynamically changing the speed of a processor. This gives rise to dualobjective scheduling problems, where the operating...
ICWN
2008
13 years 6 months ago
2008
: Problem statement: For a sensor network comprising autonomous and self-organizing data sources, efficient similarity-based search for semantic-rich resources (such as video data)...