27 search results - page 1 / 6 » Reducing data cache energy consumption via cached load store... |
ISLPED
2003
ACM
13 years 10 months ago
2003
ACM
High-performance processors use a large set–associative L1 data cache with multiple ports. As clock speeds and size increase such a cache consumes a significant percentage of t...
HPCA
2005
IEEE
14 years 5 months ago
2005
IEEE
The use of large instruction windows coupled with aggressive out-oforder and prefetching capabilities has provided significant improvements in processor performance. In this paper...
ICCD
2006
IEEE
14 years 1 months ago
2006
IEEE
— L1 data caches in high-performance processors continue to grow in set associativity. Higher associativity can significantly increase the cache energy consumption. Cache access...
MICRO
2005
IEEE
13 years 10 months ago
2005
IEEE
Conventional processors use a fully-associative store queue (SQ) to implement store-load forwarding. Associative search latency does not scale well to capacities and bandwidths re...
CASES
2008
ACM
13 years 6 months ago
2008
ACM
Java applications rely on Just-In-Time (JIT) compilers or adaptive compilers to generate and optimize binary code at runtime to boost performance. In conventional Java Virtual Mac...