9 search results - page 1 / 2 » Reducing register ports for higher speed and lower energy |
MICRO
2002
IEEE
13 years 9 months ago
2002
IEEE
The key issues for register file design in high-performance processors are access time and energy. While previous work has focused on reducing the number of registers, we propose...
ICS
2003
Tsinghua U.
13 years 9 months ago
2003
Tsinghua U.
In high-performance wide-issue microprocessors the access time, energy and area of the register file are often critical to overall performance. This is because these pararmeters g...
HPCA
2005
IEEE
14 years 4 months ago
2005
IEEE
A large multi-ported register file is indispensable for exploiting instruction level parallelism (ILP) in today's dynamically scheduled superscalar processors. The number of ...
ASYNC
2004
IEEE
13 years 8 months ago
2004
IEEE
Register files of microprocessors have often been cited as performance bottlenecks and significant consumers of energy. The robust and modular nature of quasi-delay insensitive (Q...
VLSID
2003
IEEE
14 years 5 months ago
2003
IEEE
In this paper, we describe two new algorithms for datapath scheduling which aim at energy reduction while maintaining performance. The proposed algorithms, time constrained and re...