52 search results - page 2 / 11 » Reducing the Energy Cost of Irregular Code Bases in Soft Pro... |
HPCC
2009
Springer
13 years 9 months ago
2009
Springer
Usual cache optimisation techniques for high performance computing are difficult to apply in embedded VLIW applications. First, embedded applications are not always well structur...
LCTRTS
2010
Springer
13 years 9 months ago
2010
Springer
Continuous technology scaling has brought us to a point, where transistors have become extremely susceptible to cosmic radiation strikes, or soft errors. Inside the processor, cac...
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
This work evaluates task allocation strategies based on bin-packing algorithms in the context of multiprocessor systems-on-chip (MPSoCs) with task migration capabilities, running ...
ISLPED
2006
ACM
13 years 10 months ago
2006
ACM
Interprocessor synchronization, while extremely important for ensuring execution correctness, can be very costly in terms of both power and performance overheads. Unfortunately, m...
CASES
2006
ACM
13 years 8 months ago
2006
ACM
Device scaling trends dramatically increase the susceptibility of microprocessors to soft errors. Further, mounting demand for embedded microprocessors in a wide array of safety c...