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» Reducing the number of lines in reversible circuits
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MCU
1998
154views Hardware» more  MCU 1998»
13 years 6 months ago
A computation-universal two-dimensional 8-state triangular reversible cellular automaton
A reversible cellular automaton (RCA) is a cellular automaton (CA) whose global function is injective and every configuration has at most one predecessor. Margolus showed that the...
Katsunobu Imai, Kenichi Morita
ENGL
2008
79views more  ENGL 2008»
13 years 5 months ago
Cost Reduction in Nearest Neighbour Based Synthesis of Quantum Boolean Circuits
Quantum computer algorithms require an `oracle' as an integral part. An oracle is a reversible quantum Boolean circuit, where the inputs are kept unchanged at the outputs and ...
Mozammel H. A. Khan
ASPDAC
2006
ACM
144views Hardware» more  ASPDAC 2006»
13 years 11 months ago
Compaction of pass/fail-based diagnostic test vectors for combinational and sequential circuits
Abstract— Substantial attention is being paid to the fault diagnosis problem in recent test literature. Yet, the compaction of test vectors for fault diagnosis is little explored...
Yoshinobu Higami, Kewal K. Saluja, Hiroshi Takahas...
EURODAC
1995
IEEE
164views VHDL» more  EURODAC 1995»
13 years 9 months ago
Bottleneck removal algorithm for dynamic compaction and test cycles reduction
: We present a new, dynamic algorithm for test sequence compaction and test cycle reduction for combinationaland sequential circuits. Several dynamic algorithms for compaction in c...
Srimat T. Chakradhar, Anand Raghunathan
DATE
2002
IEEE
124views Hardware» more  DATE 2002»
13 years 10 months ago
Crosstalk Alleviation for Dynamic PLAs
—The dynamic programmable logic array (PLA) style has become popular in designing high-performance microprocessors because of its high speed and predictable routing delay. Howeve...
Tzyy-Kuen Tien, Tong-Kai Tsai, Shih-Chieh Chang