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» Reduction techniques for synchronous dataflow graphs
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DAC
2006
ACM
14 years 6 months ago
Exploring trade-offs in buffer requirements and throughput constraints for synchronous dataflow graphs
Multimedia applications usually have throughput constraints. An implementation must meet these constraints, while it minimizes resource usage and energy consumption. The compute i...
Sander Stuijk, Marc Geilen, Twan Basten
ISSS
2000
IEEE
144views Hardware» more  ISSS 2000»
13 years 9 months ago
Efficient Hardware Controller Synthesis for Synchronous Dataflow Graph in System Level Design
This paper concerns automatic hardware synthesis from data flow graph (DFG) specification in system level design. In the presented design methodology, each node of a data flow gra...
Hyunuk Jung, Kangnyoung Lee, Soonhoi Ha
DAC
2007
ACM
14 years 6 months ago
Multiprocessor Resource Allocation for Throughput-Constrained Synchronous Dataflow Graphs
Abstract. Embedded multimedia systems often run multiple time-constrained applications simultaneously. These systems use multiprocessor systems-on-chip of which it must be guarante...
Sander Stuijk, Twan Basten, Marc Geilen, Henk Corp...
ISSS
2002
IEEE
120views Hardware» more  ISSS 2002»
13 years 10 months ago
Virtual Synchronization for Fast Distributed Cosimulation of Dataflow Task Graphs
Fast distributed cosimulation is a challenging problem for the embedded system design. The main theme of this paper is to increase simulation speed by reducing the frequency of in...
Soonhoi Ha, Sungchan Kim, Chan-Eun Rhee, Hyunguk J...
DAC
2006
ACM
14 years 6 months ago
Efficient simulation of critical synchronous dataflow graphs
Simulation and verification using electronic design automation (EDA) tools are key steps in the design process for communication and signal processing systems. The synchronous dat...
Chia-Jui Hsu, José Luis Pino, Ming-Yung Ko,...