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» Reduction techniques for synchronous dataflow graphs
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FM
2009
Springer
134views Formal Methods» more  FM 2009»
13 years 3 months ago
Partial Order Reductions Using Compositional Confluence Detection
Abstract. Explicit state methods have proven useful in verifying safetycritical systems containing concurrent processes that run asynchronously and communicate. Such methods consis...
Frédéric Lang, Radu Mateescu
DATE
2010
IEEE
127views Hardware» more  DATE 2010»
13 years 10 months ago
A generalized control-flow-aware pattern recognition algorithm for behavioral synthesis
— Pattern recognition has many applications in design automation. A generalized pattern recognition algorithm is presented in this paper which can efficiently extract similar pat...
Jason Cong, Hui Huang, Wei Jiang
IEEEPACT
1999
IEEE
13 years 9 months ago
Cameron: High level Language Compilation for Reconfigurable Systems
This paper presents the Cameron Project 1 , which aims to provide a high level, algorithmic language and optimizing compiler for the development of image processing applications o...
Jeffrey Hammes, Robert Rinker, A. P. Wim Böhm...
ARC
2010
Springer
167views Hardware» more  ARC 2010»
13 years 8 months ago
Systolic Algorithm Mapping for Coarse Grained Reconfigurable Array Architectures
Coarse Grained Reconfigurable Array (CGRA) architectures give high throughput and data reuse for regular algorithms while providing flexibility to execute multiple algorithms on th...
Kunjan Patel, Chris J. Bleakley