10 search results - page 1 / 2 » Register file port requirements of transport triggered archi... |
MICRO
1994
IEEE
13 years 9 months ago
1994
IEEE
Exploitation of large amounts of instruction level parallelism requires a large amount of connectivity between the shared register file and the function units; this connectivity i...
ASPLOS
2000
ACM
13 years 9 months ago
2000
ACM
The high arithmetic rates of media processing applications require architectures with tens to hundreds of functional units, multiple register files, and explicit interconnect betw...
ISCA
2003
IEEE
13 years 10 months ago
2003
IEEE
Current-generation microprocessors are designed to process instructions with one and two source operands at equal cost. Handling two source operands requires multiple ports for ea...
MICRO
2005
IEEE
13 years 10 months ago
2005
IEEE
Large numbers of logical registers can improve performance by allowing fast access to multiple subroutine contexts (register windows) and multiple thread contexts (multithreading)...
DAC
2001
ACM
14 years 6 months ago
2001
ACM
Clustering is an effective method to increase the available parallelism in VLIW datapaths without incurring severe penalties associated with large number of register file ports. E...