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» Register placement for high-performance circuits
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DAC
2009
ACM
13 years 9 months ago
RegPlace: a high quality open-source placement framework for structured ASICs
Structured ASICs have recently emerged as an exciting alternative to ASIC or FPGA design style as they provide a new trade-off between the high performance of ASIC design and low ...
Ashutosh Chakraborty, Anurag Kumar, David Z. Pan
ISPD
1998
ACM
93views Hardware» more  ISPD 1998»
13 years 9 months ago
Rectilinear block placement using sequence-pair
With the recent advent of deep sub-micron technology and new packaging schemes such as Multi-Chip Modules(MCMs), integrated circuit components are often not rectangular. Most exis...
Jin Xu, Pei-Ning Guo, Chung-Kuan Cheng
FPGA
2009
ACM
233views FPGA» more  FPGA 2009»
14 years 3 days ago
FPCNA: a field programmable carbon nanotube array
Carbon nanotubes (CNTs), with their unique electronic properties, are promising materials for building nanoscale circuits. In this paper, we present a new CNT-based FPGA architect...
Chen Dong, Scott Chilstedt, Deming Chen
DAC
2006
ACM
14 years 6 months ago
Systematic temperature sensor allocation and placement for microprocessors
Modern high performance processors employ advanced techniques for thermal management, which rely on accurate readings of on-die thermal sensors. As the importance of thermal effec...
Rajarshi Mukherjee, Seda Ogrenci Memik
ICCD
2006
IEEE
183views Hardware» more  ICCD 2006»
14 years 2 months ago
An Active Decoupling Capacitance Circuit for Inductive Noise Suppression in Power Supply Networks
The placement of on-die decoupling capacitors (decap) between the power and ground supply grids has become a common practice in high performance processor designs. In this paper, ...
Sanjay Pant, David Blaauw