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» Relation Extraction Using Support Vector Machine
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ICCD
2006
IEEE
128views Hardware» more  ICCD 2006»
14 years 1 months ago
Polaris: A System-Level Roadmap for On-Chip Interconnection Networks
Technology trends are driving parallel on-chip architectures in the form of multi-processor systems-on-a-chip (MPSoCs) and chip multi-processors (CMPs). In these systems the incre...
Vassos Soteriou, Noel Eisley, Hangsheng Wang, Bin ...
BMCBI
2008
149views more  BMCBI 2008»
13 years 5 months ago
Evolution of biological sequences implies an extreme value distribution of type I for both global and local pairwise alignment s
Background: Confidence in pairwise alignments of biological sequences, obtained by various methods such as Blast or Smith-Waterman, is critical for automatic analyses of genomic d...
Olivier Bastien, Eric Maréchal
ISCA
2011
IEEE
240views Hardware» more  ISCA 2011»
12 years 8 months ago
Virtualizing performance asymmetric multi-core systems
Performance-asymmetric multi-cores consist of heterogeneous cores, which support the same ISA, but have different computing capabilities. To maximize the throughput of asymmetric...
Youngjin Kwon, Changdae Kim, Seungryoul Maeng, Jae...
FCCM
2007
IEEE
122views VLSI» more  FCCM 2007»
13 years 8 months ago
Reconfigurable Computing Cluster (RCC) Project: Investigating the Feasibility of FPGA-Based Petascale Computing
While medium- and large-sized computing centers have increasingly relied on clusters of commodity PC hardware to provide cost-effective capacity and capability, it is not clear th...
Ron Sass, William V. Kritikos, Andrew G. Schmidt, ...