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» Retention-Aware Test Scheduling for BISTed Embedded SRAMs
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ITC
2003
IEEE
168views Hardware» more  ITC 2003»
13 years 10 months ago
A Built-In Self-Repair Scheme for Semiconductor Memories with 2-D Redundancy
Embedded memories are among the most widely used cores in current system-on-chip (SOC) implementations. Memory cores usually occupy a significant portion of the chip area, and do...
Jin-Fu Li, Jen-Chieh Yeh, Rei-Fu Huang, Cheng-Wen ...
IOLTS
2002
IEEE
99views Hardware» more  IOLTS 2002»
13 years 10 months ago
A BIST-Based Solution for the Diagnosis of Embedded Memories Adopting Image Processing Techniques
This paper proposes a new solution for the diagnosis of faults into embedded RAMs, currently under evaluation within STMicroelectronics. The proposed scheme uses dedicated circuit...
Davide Appello, Alessandra Fudoli, Vincenzo Tancor...