242 search results - page 1 / 49 » Reversible Fault-Tolerant Logic |
IAJIT
2010
13 years 3 months ago
2010
: In parity preserving reversible circuit, the parity of the input vector must match the parity of the output vector. It renders a wide class of circuit faults readily detectable a...
CORR
2010
Springer
12 years 11 months ago
2010
Springer
Combinational or Classical logic circuits dissipate heat for every bit of information that is lost. Information is lost when the input vector cannot be recovered from its correspon...
CORR
2010
Springer
13 years 2 months ago
2010
Springer
Reversible logic design has become one of the promising research directions in low power dissipating circuit design in the past few years and has found its application in low power...
DSN
2005
IEEE
13 years 10 months ago
2005
IEEE
It is now widely accepted that the CMOS technology implementing irreversible logic will hit a scaling limit beyond 2016, and that the increased power dissipation is a major limiti...
DFT
2003
IEEE
13 years 10 months ago
2003
IEEE
We describe a method for designing fault tolerant circuits based on an extension of a Concurrent Error Detection (CED) technique. The proposed extension combines parity check code...