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» Reversible Logic to Cryptographic Hardware: A New Paradigm
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MICRO
2006
IEEE
159views Hardware» more  MICRO 2006»
13 years 5 months ago
MRF Reinforcer: A Probabilistic Element for Space Redundancy in Nanoscale Circuits
Shrinking devices to the nanoscale, increasing integration densities, and reducing of voltage levels down to the thermal limit, all conspire to produce faulty systems. Frequent oc...
Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, Will...
ARITH
2001
IEEE
13 years 9 months ago
Computer Arithmetic-A Processor Architect's Perspective
The Instruction Set Architecture (ISA) of a programmable processor is the native languageof the machine. It defines the set of operations and resourcesthat are optimized for that ...
Ruby B. Lee
IPPS
2008
IEEE
13 years 11 months ago
Providing security to the Desktop Data Grid
Volunteer Computing is becoming a new paradigm not only for the Computational Grid, but also for institutions using production-level Data Grids because of the enormous storage pot...
Jesus Luna, Michail Flouris, Manolis Marazakis, An...
ICCD
2004
IEEE
135views Hardware» more  ICCD 2004»
14 years 2 months ago
Design Methodologies and Architecture Solutions for High-Performance Interconnects
In Deep Sub-Micron (DSM) technologies, interconnects play a crucial role in the correct functionality and largely impact the performance of complex System-on-Chip (SoC) designs. F...
Davide Pandini, Cristiano Forzan, Livio Baldi