55 search results - page 1 / 11 » Robustness Check for Multiple Faults Using Formal Techniques |
DSD
2009
IEEE
13 years 11 months ago
2009
IEEE
Feature sizes in VLSI circuits are steadily shrinking. This results in increasing susceptibility to soft errors, e.g. due to environmental radiation. Precautions against soft error...
DAC
2009
ACM
14 years 5 months ago
2009
ACM
Continuously shrinking feature sizes result in an increasing susceptibility of circuits to transient faults, e.g. due to environmental radiation. Approaches to implement fault tol...
FM
2003
Springer
13 years 10 months ago
2003
Springer
We present a semantics for fault tree analysis, a technique used for the analysis of safety critical systems, in the real-time interval logic Duration Calculus with Liveness and sh...
ATVA
2007
Springer
13 years 8 months ago
2007
Springer
One of the prerequisites for information society is secure and reliable communication among computing systems. Accordingly, network security appliances become key components of inf...
ATVA
2007
Springer
13 years 11 months ago
2007
Springer
Fault tree analysis is a traditional and well-established technique for analyzing system design and robustness. Its purpose is to identify sets of basic events, called cut sets, wh...