24 search results - page 4 / 5 » Rotary router: an efficient architecture for CMP interconnec... |
ISCA
2008
IEEE
13 years 5 months ago
2008
IEEE
Network-on-Chip (NoC) architectures have been adopted by a growing number of multi-core designs as a flexible and scalable solution to the increasing wire delay constraints in the...
CONEXT
2006
ACM
13 years 11 months ago
2006
ACM
A conventional enterprise or campus network comprises Ethernet-based IP subnets interconnected by routers. Although each subnet runs with minimal (or zero) configuration by virtue...
CODES
2008
IEEE
13 years 7 months ago
2008
IEEE
The performance of system-on-chip is determined not only by the performance of its functional units, but also by how efficiently they cooperate with one another. It is the on-chip...
NOCS
2010
IEEE
13 years 3 months ago
2010
IEEE
Router microarchitecture plays a central role in the performance of an on-chip network (NoC). Buffers are needed in routers to house incoming flits which cannot be immediately forw...
TC
2010
13 years 4 months ago
2010
—Switched networks have been adopted in on-chip communication for their scalability and efficient resource sharing. However, using a general network for a specific domain may res...