20 search results - page 1 / 4 » Runtime Code Parallelization for On-Chip Multiprocessors |
DATE
2003
IEEE
13 years 10 months ago
2003
IEEE
EUROPAR
2003
Springer
13 years 10 months ago
2003
Springer
As compared to a complex single processor based system, on-chip multiprocessors are less complex, more power efficient, and easier to test and validate. In this work, we focus on a...
EUROPAR
2010
Springer
13 years 5 months ago
2010
Springer
Abstract. Limited bandwidth to off-chip main memory is a performance bottleneck in chip multiprocessors for streaming computations, such as Cell/B.E., and this will become even mor...
HPCA
1998
IEEE
13 years 9 months ago
1998
IEEE
Run-time parallelization is often the only way to execute the code in parallel when data dependence information is incomplete at compile time. This situation is common in many imp...
CODES
2009
IEEE
13 years 8 months ago
2009
IEEE
Field Programmable Gate Arrays (FPGAs) have long held the promise of allowing designers to create systems with performance levels close to custom circuits but with a softwarelike ...