5 search results - page 1 / 1 » SAR ADC Algorithm with Redundancy and Digital Error Correcti... |
IEICET
2010
13 years 3 months ago
2010
ISCAS
2005
IEEE
13 years 10 months ago
2005
IEEE
—State-of-art implementations of pipelined ADCs can only realize a multiplying DAC (MDAC) with (2n –1) levels. However, the number of levels needed to optimize the performance ...
GLOBECOM
2008
IEEE
13 years 11 months ago
2008
IEEE
— Time-interleaved (TI) analog-to-digital converters (ADCs) are a promising architecture for realizing the highspeed ADCs required to implement “mostly digital” receivers for...
DCC
2003
IEEE
14 years 4 months ago
2003
IEEE
In this paper we discuss the security of digital signature schemes based on error? correcting codes. Several attacks to the Xinmei scheme are surveyed, and some reasons given to e...
CASES
2006
ACM
13 years 8 months ago
2006
ACM
Probabilistic arithmetic, where the ith output bit of addition and multiplication is correct with a probability pi, is shown to be a vehicle for realizing extremely energy-efficie...