35 search results - page 6 / 7 » SOI Transistor Model for Fast Transient Simulation |
ICCD
2004
IEEE
14 years 2 months ago
2004
IEEE
This paper presents a novel approach to reducing the complexity of the transient linear circuit analysis for a hybrid structured clock network. Topology reduction is first used to...
ICCAD
2009
IEEE
13 years 3 months ago
2009
IEEE
Boolean satisfiability (SAT) based methods have traditionally been popular for formally verifying properties for digital circuits. We present a novel methodology for formulating a...
ICCAD
2000
IEEE
13 years 10 months ago
2000
IEEE
This paper presents an efficient method for optimizing power/ground (P/G) networks by widening wires and adding decoupling capacitors (decaps). It proposes a structured skeleton t...
ICCD
2008
IEEE
14 years 2 months ago
2008
IEEE
— Extreme scaling practices in silicon technology are quickly leading to integrated circuit components with limited reliability, where phenomena such as early-transistor failures...
ISLPED
2010
ACM
13 years 4 months ago
2010
ACM
In this paper, a novel thermal-aware dynamic placement planner for reconfigurable systems is presented, which targets transient temperature reduction. Rather than solving time-...