25 search results - page 4 / 5 » Scalable High Throughput and Power Efficient IP-Lookup on FP... |
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
Modern digital signal processing applications have an increasing demand for computational power while needing to preserve low power dissipation and high flexibility. For many appl...
SIPS
2008
IEEE
13 years 11 months ago
2008
IEEE
Modern microprocessor technology is migrating from simply increasing clock speeds on a single processor to placing multiple processors on a die to increase throughput and power pe...
FPL
2008
Springer
13 years 6 months ago
2008
Springer
For the next generation of multi-core processors, the onchip interconnection networks must be efficient to achieve high data throughput and performance. Moreover, these interconne...
AHS
2006
IEEE
13 years 11 months ago
2006
IEEE
This paper describes the architecture of our dynamically reconfigurable Network-on-Chip (NoC) architecture that has been proposed for reconfigurable Multiprocessor system-on-chip ...
NOCS
2009
IEEE
14 years 1 days ago
2009
IEEE
While NoCs are efficient in delivering high throughput point-to-point traffic, their multi-hop operation is too slow for latency sensitive signals. In addition, NoCS are inefficie...