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VTS
2011
IEEE
278views Hardware» more  VTS 2011»
12 years 9 months ago
Designing a fast and adaptive error correction scheme for increasing the lifetime of phase change memories
This paper proposes an adaptive multi-bit error correcting code for phase change memories that provides a manifold increase in the lifetime of phase change memories thereby making...
Rudrajit Datta, Nur A. Touba
DAC
2009
ACM
14 years 6 months ago
PDRAM:a hybrid PRAM and DRAM main memory system
In this paper, we propose PDRAM, a novel energy efficient main memory architecture based on phase change random access memory (PRAM) and DRAM. The paper explores the challenges in...
Gaurav Dhiman, Raid Ayoub, Tajana Rosing
DAC
2009
ACM
14 years 4 days ago
PDRAM: a hybrid PRAM and DRAM main memory system
In this paper, we propose PDRAM, a novel energy efficient main memory architecture based on phase change random access memory (PRAM) and DRAM. The paper explores the challenges i...
Gaurav Dhiman, Raid Ayoub, Tajana Rosing
HPCA
2011
IEEE
12 years 9 months ago
Mercury: A fast and energy-efficient multi-level cell based Phase Change Memory system
― Phase Change Memory (PCM) is one of the most promising technologies among emerging non-volatile memories. PCM stores data in crystalline and amorphous phases of the GST materia...
Madhura Joshi, Wangyuan Zhang, Tao Li
DSN
2011
IEEE
12 years 5 months ago
LLS: Cooperative integration of wear-leveling and salvaging for PCM main memory
Phase change memory (PCM) has emerged as a promising technology for main memory due to many advan­ tages, such as better scalability, non-volatility and fast read access. However,...
Lei Jiang, Yu Du, Youtao Zhang, Bruce R. Childers,...