434 search results - page 3 / 87 » Scalable synchronous queues |
SPAA
2009
ACM
14 years 6 months ago
2009
ACM
We present three new reader-writer lock algorithms that scale under high read-only contention. Many previous reader-writer locks suffer significant degradation when many readers a...
CF
2010
ACM
13 years 11 months ago
2010
ACM
Per-core local (scratchpad) memories allow direct inter-core communication, with latency and energy advantages over coherent cache-based communication, especially as CMP architect...
MICRO
2010
IEEE
13 years 4 months ago
2010
IEEE
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...
BIRTHDAY
2010
Springer
13 years 2 months ago
2010
Springer
Abstract Queueing Petri nets are a powerful formalism that can be exploited for modeling distributed systems and analyzing their performance and scalability. By combining the model...
ISCA
2002
IEEE
13 years 11 months ago
2002
IEEE
Increasing the number of instruction queue (IQ) entries in a dynamically scheduled processor exposes more instruction-level parallelism, leading to higher performance. However, in...