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» Scan chain clustering for test power reduction
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DATE
2008
IEEE
106views Hardware» more  DATE 2008»
14 years 6 days ago
Low Power Illinois Scan Architecture for Simultaneous Power and Test Data Volume Reduction
We present Low Power Illinois scan architecture (LPILS) to achieve power dissipation and test data volume reduction, simultaneously. By using the proposed scan architecture, dynam...
Anshuman Chandra, Felix Ng, Rohit Kapur
ISQED
2005
IEEE
91views Hardware» more  ISQED 2005»
13 years 11 months ago
Power Reduction in Test-Per-Scan BIST with Supply Gating and Efficient Scan Partitioning
Swarup Bhunia, Hamid Mahmoodi-Meimand, Debjyoti Gh...
ASPDAC
2007
ACM
107views Hardware» more  ASPDAC 2007»
13 years 9 months ago
A Technique to Reduce Peak Current and Average Power Dissipation in Scan Designs by Limited Capture
Abstract-- In this paper, a technique that can efficiently reduce peak and average switching activity during test application is proposed. The proposed method does not require any ...
Seongmoon Wang, Wenlong Wei