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» Scan chain design for three-dimensional integrated circuits ...
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ICCD
2007
IEEE
161views Hardware» more  ICCD 2007»
14 years 1 months ago
Scan chain design for three-dimensional integrated circuits (3D ICs)
Scan chains are widely used to improve the testability of IC designs. In traditional 2D IC designs, various design techniques on the construction of scan chains have been proposed...
Xiaoxia Wu, Paul Falkenstern, Yuan Xie
ISQED
2002
IEEE
137views Hardware» more  ISQED 2002»
13 years 9 months ago
A Comprehensive Layout Methodology and Layout-Specific Circuit Analyses for Three-Dimensional Integrated Circuits
In this paper, we describe a comprehensive layout methodology for bonded three-dimensional integrated circuits (3D ICs). In bonded 3D integration technology, parts of a circuit ar...
Syed M. Alam, Donald E. Troxel, Carl V. Thompson
ICCD
2005
IEEE
101views Hardware» more  ICCD 2005»
14 years 1 months ago
Three-Dimensional Cache Design Exploration Using 3DCacti
As technology scales, interconnects dominate the performance and power behavior of deep submicron designs. Three-dimensional integrated circuits (3D ICs) have been proposed as a w...
Yuh-Fang Tsai, Yuan Xie, Narayanan Vijaykrishnan, ...
ICCAD
2004
IEEE
138views Hardware» more  ICCAD 2004»
14 years 1 months ago
A thermal-driven floorplanning algorithm for 3D ICs
As the technology progresses, interconnect delays have become bottlenecks of chip performance. Three dimensional (3D) integrated circuits are proposed as one way to address this p...
Jason Cong, Jie Wei, Yan Zhang
DAC
2007
ACM
13 years 8 months ago
CAD Implications of New Interconnect Technologies
This paper looks at the CAD implications of possible new interconnect technologies. We consider three technologies in particular: three dimensional ICs, carbon nanotubes as a repl...
Louis Scheffer