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TSP
2010
12 years 11 months ago
Selection policy-induced reduction mappings for Boolean networks
Developing computational models paves the way to understanding, predicting, and influencing the long-term behavior of genomic regulatory systems. However, several major challenges ...
Ivan Ivanov, Plamen Simeonov, Noushin Ghaffari, Xi...
JCNS
2002
99views more  JCNS 2002»
13 years 4 months ago
Coarse-Grained Reduction and Analysis of a Network Model of Cortical Response: I. Drifting Grating Stimuli
We present a reduction of a large-scale network model of visual cortex developed by McLaughlin, Shapley, Shelley, and Wielaard. The reduction is from many integrate-and-fire neuron...
Michael Shelley, David McLaughlin
FPL
1997
Springer
242views Hardware» more  FPL 1997»
13 years 8 months ago
Technology mapping by binate covering
Technology mapping can be viewed as the optimization problem of finding a minimum cost cover of the given Boolean network by choosing from given library of logic cells. The core of...
Michal Servít, Kang Yi
IEEEPACT
2006
IEEE
13 years 10 months ago
Two-level mapping based cache index selection for packet forwarding engines
Packet forwarding is a memory-intensive application requiring multiple accesses through a trie structure. The efficiency of a cache for this application critically depends on the ...
Kaushik Rajan, Ramaswamy Govindarajan
GLVLSI
2007
IEEE
187views VLSI» more  GLVLSI 2007»
13 years 11 months ago
DAG based library-free technology mapping
This paper proposes a library-free technology mapping algorithm to reduce delay in combinational circuits. The algorithm reduces the overall number of series transistors through t...
Felipe S. Marques, Leomar S. da Rosa Jr., Renato P...