We present a new test generation procedure for sequential circuits using newly traversed state and newly detected fault information obtained between successive iterations of vecto...
Ashish Giani, Shuo Sheng, Michael S. Hsiao, Vishwa...
We present a fast, dynamic fault coverage estimation technique for sequential circuits that achieves high degrees of accuracy by signi cantly reducing the number of injected fault...
Continuously shrinking feature sizes result in an increasing susceptibility of circuits to transient faults, e.g. due to environmental radiation. Approaches to implement fault tol...
We describe a transition fault model, which is easy to simulate under test sequences that are applied at-speed, and provides a target for the generation of at-speed test sequences...