22 search results - page 3 / 5 » Sequential circuit test generation using dynamic state trave... |
VTS
1998
IEEE
13 years 10 months ago
1998
IEEE
This paper presents a BIST architecture for Finite State Machines that exploits Cellular Automata (CA) as pattern generators and signature analyzers. The main advantage of the pro...
VTS
1999
IEEE
13 years 10 months ago
1999
IEEE
Sequential test generators fail to yield tests for some stuck-at-faults because they are unable to reach certain states necessary for exciting propagating these target faults. Add...
GECCO
2003
Springer
13 years 11 months ago
2003
Springer
Evolutionary Testing (ET) has been shown to be very successful for testing real world applications [10]. The original ET approach focusesonsearching for a high coverage of the test...
TC
1998
13 years 6 months ago
1998
ion Techniques for Validation Coverage Analysis and Test Generation Dinos Moundanos, Jacob A. Abraham, Fellow, IEEE, and Yatin V. Hoskote —The enormous state spaces which must be...
ICCAD
1997
IEEE
13 years 10 months ago
1997
IEEE
Asynchronous circuits operate correctly only under timing assumptions. Hence testing those circuits for delay faults is crucial. This paper describes a three-step method to detect...