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» Sign bit reduction encoding for low power applications
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DAC
2005
ACM
13 years 7 months ago
Sign bit reduction encoding for low power applications
This paper proposes a low power technique, called SBR (Sign Bit Reduction) which may reduce the switching activity in multipliers as well as data buses. Utilizing the multipliers ...
M. Saneei, Ali Afzali-Kusha, Zainalabedin Navabi
ICIP
2002
IEEE
14 years 6 months ago
Optimal bit allocation for low bit rate video streaming applications
Current rate control schemes in video coding standards do not have efficient frame-level bit allocation because of the inherent constraints in real-time encoding. In this paper, w...
Jianfei Cai, Zhihai He, Chang Wen Chen
ISLPED
1997
ACM
85views Hardware» more  ISLPED 1997»
13 years 9 months ago
Low power motion estimation design using adaptive pixel truncation
Power consumption is very critical for portable video applications such as portable video-phone. Motion estimation in the video encoder requires huge amount of computation and hen...
Zhong-Li He, Kai-Keung Chan, Chi-Ying Tsui, Ming L...
VLSID
2003
IEEE
108views VLSI» more  VLSID 2003»
14 years 5 months ago
A Low Power-Delay Product Page-Based Address Bus Coding Method
The working-zone encoding (WZE) method employing locality of memory reference was previously proposed to reduce address bus switching activity. This paper presents an encoding met...
Chi-Ming Tsai, Guang-Wan Liao, Rung-Bin Lin
GLVLSI
2003
IEEE
239views VLSI» more  GLVLSI 2003»
13 years 10 months ago
CMOS flash analog-to-digital converter for high speed and low voltage applications
A CMOS flash analog-to-digital converter (ADC) designed for high speed and low voltage is presented. Using the Threshold Inverter Quantization (TIQ) comparator technique, a flas...
Jincheol Yoo, Kyusun Choi, Jahan Ghaznavi