8 search results - page 1 / 2 » Simultaneous communication and processor voltage scaling for... |
ICCAD
2004
IEEE
14 years 1 months ago
2004
IEEE
In this paper, we propose a new technique for the combined voltage scaling of processors and communication links, taking into account dynamic as well as leakage power consumption....
ICCAD
2002
IEEE
14 years 1 months ago
2002
IEEE
Dynamic voltage scaling (DVS) reduces the power consumption of processors when peak performance is unnecessary. However, the achievable power savings by DVS alone is becoming limi...
JCSC
2002
13 years 4 months ago
2002
There is a growing need to analyze and optimize the stand-by component of power in digital circuits designed for portable and battery-powered applications. Since these circuits re...
ICCAD
2003
IEEE
14 years 1 months ago
2003
IEEE
Abstract— Dynamic voltage scaling (DVS) is a powerful technique for reducing dynamic power consumption in a computing system. However, as technology feature size continues to sca...
ICCAD
2001
IEEE
14 years 1 months ago
2001
IEEE
Dynamic voltage scaling (DVS) is a technique that varies the supply voltage and clock frequency based on the computation load to provide desired performance with the minimal amoun...