9 search results - page 1 / 2 » Simultaneous power and thermal integrity driven via stapling... |
ICCAD
2006
IEEE
14 years 1 months ago
2006
IEEE
The existing work on via-stapling in 3D integrated circuits optimizes power and thermal integrity separately and uses steadystate thermal analysis. This paper presents the first ...
ISLPED
2006
ACM
13 years 10 months ago
2006
ACM
All existing methods for thermal-via allocation are based on a steady-state thermal analysis and may lead to excessive number of thermal vias. This paper develops an accurate and ...
DAC
2012
ACM
11 years 7 months ago
2012
ACM
In this paper, we propose two methods used in 3D IC placement that effectively exploit the die-to-die thermal coupling in the stack. First, TSVs are spread on each die to reduce t...
ASPDAC
2007
ACM
13 years 8 months ago
2007
ACM
- 3D IC technologies can help to improve circuit performance and lower power consumption by reducing wirelength. Also, 3D IC technology can be used to realize heterogeneous system-...
ICCAD
2009
IEEE
13 years 2 months ago
2009
IEEE
Heat removal and power delivery have become two major reliability concerns in 3D stacked IC technology. For thermal problem, two possible solutions exist: thermal-through-silicon-...