32 search results - page 6 / 7 » Sizing of Clock Distribution Networks for High Performance C... |
HPCA
2009
IEEE
14 years 5 months ago
2009
IEEE
Performance and power consumption of an on-chip interconnect that forms the backbone of Chip Multiprocessors (CMPs), are directly influenced by the underlying network topology. Bo...
IPPS
2008
IEEE
13 years 11 months ago
2008
IEEE
Website capacity determination is crucial to measurement-based access control, because it determines when to turn away excessive client requests to guarantee consistent service qu...
HOTI
2008
IEEE
13 years 11 months ago
2008
IEEE
Cell Broadband EngineTM is a multi-core system on a chip and is composed of a general-purpose Power Processing Element (PPE) and eight Synergistic Processing Elements (SPEs). Its ...
HPCA
2009
IEEE
14 years 5 months ago
2009
IEEE
Cache hierarchies in future many-core processors are expected to grow in size and contribute a large fraction of overall processor power and performance. In this paper, we postula...
HPCA
2009
IEEE
14 years 5 months ago
2009
IEEE
Interconnection plays an important role in performance and power of CMP designs using deep sub-micron technology. The network-on-chip (NoCs) has been proposed as a scalable and hi...