71 search results - page 3 / 15 » Snug set-associative caches: reducing leakage power while im... |
IEEEPACT
1999
IEEE
13 years 10 months ago
1999
IEEE
The performance of applications on large shared-memory multiprocessors with coherent caches depends on the interaction between the granularity of data sharing, the size of the coh...
TC
2008
13 years 6 months ago
2008
This paper describes a new on-demand wake-up prediction policy for reducing leakage power. The key insight is that branch prediction can be used to selectively wake up only the nee...
ICCD
2007
IEEE
13 years 10 months ago
2007
IEEE
The emerging trend of larger number of cores or processors on a single chip in the server, desktop, and mobile notebook platforms necessarily demands larger amount of on-chip last...
DAC
2012
ACM
11 years 8 months ago
2012
ACM
Spin-Transfer Torque RAM (STT-RAM) is an emerging non-volatile memory (NVM) technology that has the potential to replace the conventional on-chip SRAM caches for designing a more ...
CF
2005
ACM
13 years 8 months ago
2005
ACM
Technology projections indicate that static power will become a major concern in future generations of high-performance microprocessors. Caches represent a significant percentage ...