107 search results - page 3 / 22 » Software Cache Coherence for Large Scale Multiprocessors |
ISCA
1990
IEEE
13 years 9 months ago
1990
IEEE
An adaptive cache coherence mechanism exploits semantic information about the expected or observed access behavior of particular data objects. We contend that, in distributed shar...
ICPP
1996
IEEE
13 years 9 months ago
1996
IEEE
- Among all software cache coherence strategaes, the ones that are based on the concept of tamestamps show the greatest potentaal an terms of cache performance. The early tamestamp...
SIGMETRICS
1996
ACM
13 years 9 months ago
1996
ACM
A large and increasing gap exists between processor and memory speeds in scalable cache-coherent multiprocessors. To cope with this situation, programmers and compiler writers mus...
DSN
2011
IEEE
12 years 5 months ago
2011
IEEE
—Aggressive technology scaling causes chip multiprocessors increasingly error-prone. Core-level faulttolerant approaches bind two cores to implement redundant execution and error...
ISCA
2011
IEEE
12 years 9 months ago
2011
IEEE
As we move to large manycores, the hardware-based global checkpointing schemes that have been proposed for small shared-memory machines do not scale. Scalability barriers include ...