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DAC
2002
ACM
14 years 5 months ago
Scheduler-based DRAM energy management
Previous work on DRAM power-mode management focused on hardware-based techniques and compiler-directed schemes to explicitly transition unused memory modules to low-power operatin...
Victor Delaluz, Anand Sivasubramaniam, Mahmut T. K...
SIGOPSE
2004
ACM
13 years 10 months ago
When physical is not real enough
This position paper argues that policies for physical memory management and for memory power mode control should be relocated to the system software of a programmable memory manag...
Frank Bellosa
ICCAD
2010
IEEE
145views Hardware» more  ICCAD 2010»
13 years 2 months ago
Fuzzy control for enforcing energy efficiency in high-performance 3D systems
3D stacked circuits reduce communication delay in multicore system-on-chips (SoCs) and enable heterogeneous integration of cores, memories, sensors, and RF devices. However, vertic...
Mohamed M. Sabry, Ayse Kivilcim Coskun, David Atie...
MICRO
2008
IEEE
149views Hardware» more  MICRO 2008»
13 years 11 months ago
Prefetch-Aware DRAM Controllers
Existing DRAM controllers employ rigid, non-adaptive scheduling and buffer management policies when servicing prefetch requests. Some controllers treat prefetch requests the same ...
Chang Joo Lee, Onur Mutlu, Veynu Narasiman, Yale N...
TCAD
2008
167views more  TCAD 2008»
13 years 4 months ago
System-Level Dynamic Thermal Management for High-Performance Microprocessors
Abstract--Thermal issues are fast becoming major design constraints in high-performance systems. Temperature variations adversely affect system reliability and prompt worst-case de...
Amit Kumar 0002, Li Shang, Li-Shiuan Peh, Niraj K....