25 search results - page 5 / 5 » Space and Time Sharing of Reconfigurable Hardware for Accele... |
ICCAD
2006
IEEE
14 years 2 months ago
2006
IEEE
A dynamically reconfigurable processor (DRP) is designed to achieve high area efficiency by switching reconfigurable data paths dynamically. Our DRP architecture has a stand alone...
JCPHY
2011
12 years 8 months ago
2011
The calculation of radial distribution functions (RDFs) from molecular dynamics trajectory data is a common and computationally expensive analysis task. The rate limiting step in ...
ICPP
2008
IEEE
13 years 11 months ago
2008
IEEE
Computer manufacturers spend a huge amount of time, resources, and money in designing new systems and newer configurations, and their ability to reduce costs, charge competitive p...
IEEEPACT
2008
IEEE
13 years 11 months ago
2008
IEEE
Moore’s Law and the drive towards performance efficiency have led to the on-chip integration of general-purpose cores with special-purpose accelerators. Pangaea is a heterogeneo...
HPCA
2002
IEEE
14 years 5 months ago
2002
IEEE
We propose a low overhead, on-line memory monitoring scheme utilizing a set of novel hardware counters. The counters act like pressure gauges indicating the marginal gain in the n...