Based on a timing yield model, a statistical static timing analysis technique is proposed. This technique preserves existing methodology by selecting a “device file setting” ...
A system-level statistical analysis methodology is described that captures the impact of inter- and intra-die process variations for read timing failures in SRAM circuit blocks. U...
Soner Yaldiz, Umut Arslan, Xin Li, Larry T. Pilegg...
Anonymous communications provides an important privacy service by keeping passive eavesdroppers from linking communicating parties. However, using long-term statistical analysis of...
: In chip design, one of the main objectives is to decrease its clock cycle; however, the existing approaches to timing analysis under uncertainty are based on fundamentally restri...
Michael Orshansky, Wei-Shen Wang, Martine Ceberio,...
—The issue of data-aided joint carrier frequency offset (CFO) and channel estimation is investigated in the presence of a rapidly time-varying frequency-selective channel. We der...