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ICCAD
2003
IEEE
205views Hardware» more  ICCAD 2003»
13 years 10 months ago
Statistical Timing Analysis for Intra-Die Process Variations with Spatial Correlations
Process variations have become a critical issue in performance verification of high-performance designs. We present a new, statistical timing analysis method that accounts for int...
Aseem Agarwal, David Blaauw, Vladimir Zolotov
DATE
2005
IEEE
107views Hardware» more  DATE 2005»
13 years 10 months ago
On Statistical Timing Analysis with Inter- and Intra-Die Variations
In this paper, we highlight a fast, effective and practical statistical approach that deals with inter and intra-die variations in VLSI chips. Our methodology is applied to a numb...
Hratch Mangassarian, Mohab Anis
DATE
2008
IEEE
161views Hardware» more  DATE 2008»
13 years 11 months ago
Spatial Correlation Extraction via Random Field Simulation and Production Chip Performance Regression
Statistical timing analysis needs a priori knowledge of process variations. Lack of such a priori knowledge of process variations prevents accurate statistical timing analysis, fo...
Bao Liu
ICCAD
2006
IEEE
147views Hardware» more  ICCAD 2006»
14 years 1 months ago
Analysis and modeling of CD variation for statistical static timing
Statistical static timing analysis (SSTA) has become a key method for analyzing the effect of process variation in aggressively scaled CMOS technologies. Much research has focused...
Brian Cline, Kaviraj Chopra, David Blaauw, Yu Cao
ICCD
2006
IEEE
157views Hardware» more  ICCD 2006»
14 years 1 months ago
Statistical Analysis of Power Grid Networks Considering Lognormal Leakage Current Variations with Spatial Correlation
— As the technology scales into 90nm and below, process-induced variations become more pronounced. In this paper, we propose an efficient stochastic method for analyzing the vol...
Ning Mi, Jeffrey Fan, Sheldon X.-D. Tan