8 search results - page 1 / 2 » Statistical timing analysis of flip-flops considering codepe... |
GLVLSI
2008
IEEE
13 years 11 months ago
2008
IEEE
Statistical static timing analysis (SSTA) plays a key role in determining performance of the VLSI circuits implemented in state-of-the-art CMOS technology. A pre-requisite for emp...
ISCAS
2005
IEEE
13 years 10 months ago
2005
IEEE
—As process variations become a significant problem in deep sub-micron technology, a shift from deterministic static timing analysis to statistical static timing analysis for hig...
ISQED
2010
IEEE
13 years 11 months ago
2010
IEEE
With the CMOS transistors being scaled to sub 45nm and lower, Negative Bias Temperature Instability (NBTI) has become a major concern due to its impact on PMOS transistor aging pr...
ICCAD
2005
IEEE
14 years 1 months ago
2005
IEEE
Based on a timing yield model, a statistical static timing analysis technique is proposed. This technique preserves existing methodology by selecting a “device file setting” ...
INFOCOM
2000
IEEE
13 years 9 months ago
2000
IEEE
—This paper considers the design of handoff rerouting algorithms for reducing the overall session cost in personal communication systems (PCS). Most modern communication systems ...