Sciweavers

12 search results - page 2 / 3
» Storage Assignment to Decrease Code Size
Sort
View
CASES
2001
ACM
13 years 8 months ago
Storage allocation for embedded processors
In an embedded system, it is common to have several memory areas with different properties, such as access time and size. An access to a specific memory area is usually restricted...
Jan Sjödin, Carl von Platen
ITC
2003
IEEE
139views Hardware» more  ITC 2003»
13 years 10 months ago
A Hybrid Coding Strategy For Optimized Test Data Compression
Store-and-generate techniques encode a given test set and regenerate the original test set during the test with the help of a decoder. Previous research has shown that runlength c...
Armin Würtenberger, Christofer S. Tautermann,...
WWW
2004
ACM
14 years 5 months ago
Optimization of html automatically generated by wysiwyg programs
Automatically generated HTML, as produced by WYSIWYG programs, typically contains much repetitive and unnecessary markup. This paper identifies aspects of such HTML that may be al...
Jacqueline Spiesser, Les Kitchen
IPPS
2005
IEEE
13 years 10 months ago
Technology-based Architectural Analysis of Operand Bypass Networks for Efficient Operand Transport
As semiconductor feature sizes decrease, interconnect delay is becoming a dominant component of processor cycle times. This creates a critical need to shift microarchitectural des...
Hongkyu Kim, D. Scott Wills, Linda M. Wills
DAC
2005
ACM
14 years 5 months ago
Memory access optimization through combined code scheduling, memory allocation, and array binding in embedded system design
In many of embedded systems, particularly for those with high data computations, the delay of memory access is one of the major bottlenecks in the system's performance. It ha...
Jungeun Kim, Taewhan Kim