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» Strained-si devices and circuits for low-power applications
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ISLPED
2003
ACM
71views Hardware» more  ISLPED 2003»
13 years 10 months ago
Strained-si devices and circuits for low-power applications
Static and dynamic power for strained-Si device is analyzed and compared with conventional bulk-Si technology. Optimum device design points are suggested with controlling physical...
Keunwoo Kim, Rajiv V. Joshi, Ching-Te Chuang
ISLPED
1997
ACM
91views Hardware» more  ISLPED 1997»
13 years 8 months ago
Fully depleted CMOS/SOI device design guidelines for low power applications
In this paper we report the fully depleted CMOS/SOI device design guidelines for low power applications. Optimal technology, device and circuit parameters are discussed and compar...
Srinivasa R. Banna, Philip C. H. Chan, Mansun Chan...
ISQED
2000
IEEE
131views Hardware» more  ISQED 2000»
13 years 9 months ago
Low Power Testing of VLSI Circuits: Problems and Solutions
Power and energy consumption of digital systems may increase significantly during testing. This extra power consumption due to test application may give rise to severe hazards to ...
Patrick Girard
DAC
2005
ACM
14 years 5 months ago
Hardware speech recognition for user interfaces in low cost, low power devices
We propose a system architecture for real-time hardware speech recognition on low-cost, power-constrained devices. The system is intended to support real-time speech-based user in...
Sergiu Nedevschi, Rabin K. Patra, Eric A. Brewer
VTC
2006
IEEE
134views Communications» more  VTC 2006»
13 years 10 months ago
Ultra Low-Power Digital Demodulators for Short Range Applications
— In this paper we present extremely flexible and low power digital binary ASK, PSK, and FSK demodulator architectures for short-range applications that uses limiter amplifier (i...
Mehmet R. Yuce, Ahmet Tekin